CHIP ENABLE SIGNAL CONTROL CIRCUIT OF DUAL PORT MEMORY DEVICE

摘要

The circuit controls the enable signal for operating a chip when data are transmitted between a RAM (random access memory) port and a SAM (serial access memory) port and comprises a switching means (NO1) for receiving a chip enable signal (RAS) at one input terminal and a latch means (NO2,NO3) for receiving the output of the switching means (NO1) through inverters (I1,I2) at one input terminal and a first clock (CLK1) indicating completion of a data transmission at another input terminal to output a second clock (CLK2) as a mast clock inside the chip. The circuit enlarges an active region of the mast clock to stabilize the data transmitting operation.