DATA LINK INTERFACE APPARATUS

摘要

A parity checking and generating circuit (3) receives a first valid bit (V) and a second valid bit for comparing them with each other to check the parity and generates parity bits. A first interface circuit outputs 16-bit data to a data link unit, and a data selecting circuit (27) selects only active data from the data of the diplexing data link unit. A second interface circuit includes means (21,22) for latching and driving the 16-bit data, and a clock selecting and distributing circuit furnishes synchronizing clocks to the data which are interfaced. With the apparatus, an interfacing is made possible within a time switch.