发明名称 |
CIRCUIT FOR EXTRACTING ASYNCHRONOUS SIGNAL. |
摘要 |
<p>A circuit for extracting asynchronous signals which extracts the asynchronous signals multiplexed in a synchronous frame comprises a separating part (1) for separating a clock signal synchronized with an effective data in the asynchronous signals from them, a buffer memory (2) in which the effective data in the separated asynchronous signals is written by using the clock signal as a write clock signal, a phase synchronizing circuit (3) for generating a readout clock signal for the memory (2), and a controlling part (5) which controls the changeover of the band of a low-pass filter (4) in the circuit (3) periodically or according to the detecting signal for pointer-adjustment. Low-frequency jitters included in the readout clock signal is suppressed. <IMAGE></p> |
申请公布号 |
EP0491054(A1) |
申请公布日期 |
1992.06.24 |
申请号 |
EP19910911754 |
申请日期 |
1991.07.04 |
申请人 |
FUJITSU LIMITED |
发明人 |
YAMASHITA, HARUO, 103, DAIICHI IIZUKA KOPPO;TAKIZAWA, YUJI, FUJITSU NAKAHARA HAUSE W-10 401 |
分类号 |
H04J3/00;H03L7/14;H04J3/06;H04J3/07;H04L5/24;H04L7/00;H04L7/08;H04L25/05 |
主分类号 |
H04J3/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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