MEZZI A RIDONDANZA PER UN DISPOSITIVO DI MEMORIA A SEMICONDUTTORI E RELATIVO PROCEDIMENTO

摘要

There is disclosed a redundant device for a semiconductor memory device comprising a plurality of normal cell arrays each having sense amplifier comprising an isolation gate for isolating or connecting the bit lines between adjacent ones of the normal cell arrays in response to isolation signal, a redundant cell array connected only with one of the adjacent redundant cell arrays, a control signal generating device for generating the isolation signal and a sensing signal to control the sense amplifiers respectively corresponding with the normal cell array connected with the redundant cell array and the normal cell array not connected with the redundant cell array, and device for generating a redundant control signal in response to a defect of an externally inputted address signal and a signal to select a word line of the redundant cell array.