发明名称 ARITHMETIC DEVICE
摘要 PURPOSE:To obtain an OR of absolute values at high speed by installing an OR circuit for directly obtaining an arithmetic unit output and a register output between the arithmetic unit output and a register output between the arithmetic unit and the register. CONSTITUTION:Under the control of control unit 4a, the first numeric data in memory circuit 1 is read out, and set in ALU2 through data bus D1, and with this, ALU2 obtains the absolute value of set numeric data, and outputs the absolute value to an OR circuit 6 and multiplexor 5. Of these, is obtained a logical sum of the output from ALU2 and data stored in register 3 through an OR circuit 6, and a result is output to a multiplexor 5. The multiplexor 5 selects output from the OR circuit 6 and stores a selected output in register 3. Next, controller 4a sets the second numeric data stored in memory circuit 1 in ALU2, and by repeating the above operations N times the OR of absolute values of N numeric data items stored in memory circuit 1 can be obtained from register 3.
申请公布号 JPH04172524(A) 申请公布日期 1992.06.19
申请号 JP19900301986 申请日期 1990.11.06
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 FUJIMOTO YUKIHIRO
分类号 G06F7/00 主分类号 G06F7/00
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