发明名称 ASYNCHORNOUS TYPE FREQUENCY MULTIPLIER CIRCUIT
摘要 <p>PURPOSE:To obtain a multiple signal without missing of wave by providing a CR oscillation circuit provided with an oscillation frequency adjustment means, a synchronizing circuit synchronizing a data signal from a microprocessor with a clock signal from the CR oscillation circuit and a frequency doubler circuit to the circuit. CONSTITUTION:A CR oscillation circuit 10 outputs an oscillating signal OSG with a frequency depending on a CR constant through the CR oscillation and the signal OSG is inputted to a frequency divider circuit 2. The frequency divider circuit 2 frequency-divides the oscillation signal at a prescribed rate, outputs a clock signal CK and it is given to a synchronizing circuit 3 and a frequency doubler circuit 4. A signal CPU from a microprocessor (CPU) given to the synchronizing circuit 3 is synchronized by the clock signal CK and the circuit 3 outputs a signal Q. The signal Q is inputted to the frequency doubler circuit 4 together with the clock signal CK, in which the frequency of the signal Q is doubled by using the clock signal CK and an output signal QH is obtained, When missing wave takes place in a frequency doubler signal QH, a variable resistor 14 of the CR oscillation circuit 10 is adjusted to adjust the frequency of the oscillation signal OSG, resulting that a frequency doubler circuit without wave missing is obtained.</p>
申请公布号 JPH04172710(A) 申请公布日期 1992.06.19
申请号 JP19900299862 申请日期 1990.11.07
申请人 TOSHIBA CORP 发明人 IWASA HARUYUKI;KOJIMA SATORU
分类号 G06F1/04;H03K5/00 主分类号 G06F1/04
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