| 摘要 |
<p>PURPOSE:To rapidly execute processing corresponding to a bit pattern independently of the sort of a comparing bit pattern by simultaneously comparing plural bit patterns with input data by plural comparing registers. CONSTITUTION:Different kinds of bit patterns are respectively set up in the comparing registers CPR1 to CPR4, which simultaneously execute comparison coincidence detecting operation in parallel with a bit pattern inputted to a shift register. Branched addresses A1 to A4 to be used for respectively different data processing are stored in address registers AR1 to AR4. Comparison coincidence outputs HT1 to HT4 from respective registers CPR1 to CPR4 are supplied to gate circuits G1 to G4 and the gate circuit corresponding to each coincidence output opens its gate and the branch address of the address register corresponding to the gate is set up in a program counter. Consequently, processing corresponding to each bit pattern can rapidly be executed independently of the sort of a comparing bit pattern.</p> |
