发明名称 |
A semiconductor memory with separate time-out control for read and write operations. |
摘要 |
<p>A read/write memory having timed-out control of certain of its peripheral circuitry is disclosed. The control circuit for controlling the time at which time-out is to occur includes two delay stages of different lengths. The shorter delay stage is used to define the time-out in a read operation, and the longer delay stage is used to define the time-out in a write operation, since a read operation can generally be accomplished sooner than a write operation. Enabling of the periphery is controlled by an address transition detection circuit, and by a data transition detection circuit. The circuit includes a short path by which enabling of the periphery is performed responsive to a data transition in the absence of an address transition, in order to perform a late write operation. <IMAGE></p> |
申请公布号 |
EP0490679(A2) |
申请公布日期 |
1992.06.17 |
申请号 |
EP19910311570 |
申请日期 |
1991.12.12 |
申请人 |
SGS-THOMSON MICROELECTRONICS, INC. |
发明人 |
COKER, THOMAS ALLYN;MCCLURE, DAVID CHARLES |
分类号 |
G11C11/41;G11C8/18;G11C7/22 |
主分类号 |
G11C11/41 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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