发明名称 FORMATION OF METAL INTERCONNECTION
摘要 PURPOSE:To avoid shorts among interconnections for obtaining an interconnection pattern of high yield and high reliability by patterning a plating current path and barrier metal self-alignedly by using an anisotropic etching method in combination with an isotropic etching one. CONSTITUTION:An insulating film is formed which contains a silicon polyimide layer 3 having a through hole 4 to reach a lower layer interconnection 2 which is formed on one principal plane of a semiconductor substrate 1. Then, either a titanium film or a titanium-alloy film 5 and a gold film 6 are deposited in this order on the whole surface of the substrate 1. After formation of a photoresist pattern, first gold-plated interconnections 7a, 7b are formed and then the whole surface of the substrate is etched by an anisotropic etching method to remove the gold film in a region 7c other than a region just below the first gold-plated interconnections 7a, 7b. Nextly, another photoresist pattern is formed. After that, a second gold-plated interconnection B is formed on parts of the first gold-plated interconnections 7a, 7b and the titanium film or titanium-allay film 5 in the region 7c other than the region just below the first gold-plated interconnections 7a, 7b is removed by isotropic etching. Consequently, shorts among interconnections are prevented from occurring and thus an interconnection pattern of high-yield and high-reliability can be obtained.
申请公布号 JPH04170031(A) 申请公布日期 1992.06.17
申请号 JP19900297416 申请日期 1990.11.02
申请人 NEC CORP 发明人 KONO HIROMICHI
分类号 H01L21/28;C25D5/02;C25D7/12;H01L21/288;H01L21/3205;H01L21/321;H01L21/60;H01L23/52 主分类号 H01L21/28
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