Multiprocessor system with shared memory includes primary processor which selectively accesses primary local memory and common memories without using arbiter

摘要

In a multiprocessor system comprising a primary processor and at least one subsidiary processor, the primary processor carries out an operation by the use of a predetermined address space divided into first and partial address spaces assigned to the primary processor and to both the primary and the subsidiary processors in common, respectively. The primary processor is coupled to a primary local memory defining the first partial address space while each subsidiary processor is coupled to a common memory to which the second partial address space is assigned by dividing the second partial address space. Each common memory is coupled to the primary processor through a first gate circuit and to each subsidiary processor through a second gate circuit. The first and the second gate circuits are controlled by a controlled to selectively connect the primary and each subsidiary processors to the common memory and to thereby share the same with the primary and each subsidiary processors.