DIGITAL FREQUENCY GENERATOR

摘要

A digital frequency generator is formed from generators for fist and second clock signals which feed a frequency adder stage that produces an output having a frequency of the sum of the frequency of the second clock signal and one half the frequency of the first clock signal. The frequency adder stage is formed from a phase shifter which produces four different phases, each at a frequency of the first clock signal divided by two, and a multiplexer which selects phases under the control of a sequence controller supplying an address signal thereto. The sequence controller is fed from the first and second clock signals and produces in an address counter a sequence of count states synchronously with edges of the first clock signal after an ascending edge of the second clock signal. The count state of the address counter determines the selected phase. The pattern of selected phases during said sequence of count states is such that the output of the multiplexer exhibits four sequential asymmetrical cycles each spanning one and one half cycles of the first clock signal, while before and after said sequence of count states the same phase is selected to produce at the output of the multiplexer symmetrical sequential cycles each spanning two cycles of the first clock signal.