发明名称 |
VARIABLE PULSE WIDTH GENERATOR INCLUDING A TIMER VERNIER |
摘要 |
A pulse logic circuit comprises a plurality of interconnected stages. Each of the stages includes a relatively large node-charging transistor which, when enabled, forwards charging current to a node from a timing pulse of one of a plurality of phases applied to a load capacitance in series with the node-charging transistor. Such large transistors exhibit significant gate-to-source and gate-to drain distributed capacitances. The response time for charging a selected stage node can be decreased by precharging the gate of the node-charging transistor of a selected stage to enable the transistor prior to the application of a timing pulse, thereby increasing the maximum operating speed of the circuit. Disclosed species of such a pulse logic circuit include time vernier circuits which can be utilized as control circuitry for a liquid crystal television or computer display.
|
申请公布号 |
US5122676(A) |
申请公布日期 |
1992.06.16 |
申请号 |
US19900620681 |
申请日期 |
1990.12.03 |
申请人 |
THOMSON, S.A. |
发明人 |
STEWART, ROGER G.;BRIGGS, GEORGE R. |
分类号 |
G09G3/20;G09G3/36;H03M1/82 |
主分类号 |
G09G3/20 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|