| 摘要 |
A synchronous BiCMOS logic circuit which operates between two voltage supplies and has at least one input terminal, an intermediate node and an output terminal is disclosed. The logic circuit is capable of a high speed transition in response to a signal pulse from a first logic state to a second logic state at the input terminal. The logic circuit has at least one MOS input transistor of a first polarity having a gate electrode connected to the input terminal. The MOS input transistor is coupled between the first voltage supply and the output node by its source/drain electrodes. A first current supply connected to the output node to the second voltage supply and weakly holds the intermediate node low when the logic circuit is in an initial state with the MOS input transistor turned off.
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