发明名称 VARIABLE FRAME PATTERN SYNCHRONIZING CIRCUIT
摘要 PURPOSE:To eliminate the need for the provision of a frame pattern synchronizing circuit for each different frame pattern for synchronization detection by executing the detection of synchronization to an optional frame pattern. CONSTITUTION:A frame pattern latch means 1 latches an input signal pattern with a clear signal, and a frame detection means 2 counts a prescribed number of patterns when the pattern is cleared by the clear signal and detects a frame. A frame pattern comparison means 3 outputs a frame synchronizing signal when the input signal pattern in the detected frame is coincident with the pattern latched by the frame pattern latch means 1 and outputs the clear signal when dissident. Thus, it is possible to detect synchronization of all frame patterns. Thus, it is not required to provide a frame pattern synchronizing circuit for each different frame pattern for the detection of synchronization.
申请公布号 JPH04167722(A) 申请公布日期 1992.06.15
申请号 JP19900292159 申请日期 1990.10.31
申请人 FUJITSU LTD 发明人 MIYAZAKI CHIAKI;OYAMA KENICHI
分类号 H04J3/06;H04L7/08 主分类号 H04J3/06
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