发明名称
摘要 PURPOSE:To minimize the warpage of a substrate, and to maintain the accuracy of mask alignment in a photoetching process, etc. while improving mass-producing capability by forming a diffusion region using phosphorus as an impurity. CONSTITUTION:The N<+> type silicon semiconductor substrate 11 of high impurity concentration of 5X10<18>/cm<3>, which uses antimony as an impurity, is prepared. The thickness of the substrate 11 shall be approximately 390mum, and the N<+> type diffusion regions 12 are formed onto both surfaces so that thickness is made to reach approximately 50mum and surface impurity concentration 5X 10<19>/cm<3> or more. Phosphorus is used as the impurity. The diffusion region 12 may be formed only onto one surface of the substrate 11. One surface of the substrate 11 is etched and one of the diffusion regions 12 is removed, and an etching surface is specular-processed. An N<-> type epitaxial layer 13 to which phosphorus is doped is grown onto a specular-processed surface. The substrate 11 is inclined to be warped to the side to which phosphorus is doped when it is doped, and warpage can be restricted to a minimum by offsetting the property and warpage to the epitaxial layer 13 side.
申请公布号 JPH0435898(B2) 申请公布日期 1992.06.12
申请号 JP19820062900 申请日期 1982.04.14
申请人 SANYO ELECTRIC CO 发明人 YAJIMA KUNIO
分类号 H01L21/205;H01L21/20;H01L21/22 主分类号 H01L21/205
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