Special flip=flop with auxiliary reset transistor - has two main transistors turned on by opposite levels of binary input

摘要

One main FET (1) is rendered conductive by a high logic level of voltage at its gate electrode. The other FET (2) is turned by a low level at its gate, which is connected to the drain of the first FET. A high-level input (c) turns-on both FETs. Reset is effected by a highlevel input (e) to turn on the auxiliary transistor (3). Alternatively, a complementary pair replaces the first FET and resistance (5). ADVANTAGE - Reset time by interruption of the operating voltage supply.