| 摘要 |
An integrated circuit having MIS transistors that include pull-up and pull-down gate input resistors of a high enough resistance value to be useful. The high resistance values are obtained in spite of using self-aligned refractory metal silicide films by redefining available channel stoppers to form one electrode end of the resistor and a contact region in a lightly doped substrate or well region to form the second electrode end.
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