发明名称 AUDIO SIGNAL DEMODULATING CIRCUIT WITH REDUCED POWER CONSUMPTION
摘要 PCT No. PCT/JP89/01087 Sec. 371 Date Aug. 6, 1990 Sec. 102(e) Date Aug. 6, 1990 PCT Filed Oct. 24, 1989 PCT Pub. No. WO90/04901 PCT Pub. Date May 3, 1990.In an audio signal demodulating circuit, an externally supplied reference clock signal is frequency-divided so that the frequency-divided clock signals are supplied to circuit units constituting the audio signal demodulating circuit as clock signals having lower frequencies. A logic circuit is provided to respond to a timing pulse generated synchronously with a video signal so as to set input data or clock signals supplied to the aforementioned circuit units to a low level or a high level during a time period other than the time period of an audio signal, whereby electric power consumption in the audio signal demodulating circuit is markedly reduced.
申请公布号 US5121212(A) 申请公布日期 1992.06.09
申请号 US19900499353 申请日期 1990.08.06
申请人 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.;NIPPON HOSO KYOKAI 发明人 OKUMURA, NAOJI;ARITA, HISASHI;NINOMIYA, YUICHI;OHTSUKA, YOSHIMICHI;KAWASHIMA, TADASHI;IWAMOTO, TAKUSHI
分类号 H04B1/16;H04N5/60;H04N7/015;H04N7/088 主分类号 H04B1/16
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