发明名称 BALANCE ADJUSTMENT DEVICE
摘要 PURPOSE:To avoid an event that 2nd balance adjustment may take much time when a test signal generator is once selected and released again by storing the adjustment value of a balance adjustment circuit in a register while a test signal is applied and the stored adjustment value is returned to the balance adjustment circuit after the end of the period. CONSTITUTION:The adjustment device is provided with a 2nd register 9 built in a balance adjustment circuit 6 and storing the adjustment value in response to the level difference of a left and right stereo signal, a 1st register 10 storing the data stored in the 2nd register 9 during the application of the test signal, and a detection circuit 11 waveform-shaping a switching control signal from a control terminal 14. In this case, when a test signal period is finished and the signal falls down, the trailing is detected by a trailing edge detection circuit 13 and fed to a clock terminal of the 2nd register 9, the 2nd register 9 fetches the data of the 1st register 10. Since the data is the same as that stored in the 2nd register 9 just before the test signal period, the adjustment is immediately executed when the left/right stereo signal is applied.
申请公布号 JPH04162900(A) 申请公布日期 1992.06.08
申请号 JP19900289236 申请日期 1990.10.26
申请人 SANYO ELECTRIC CO LTD 发明人 ISHIKAWA TSUTOMU;MEYA MASATO
分类号 H04S7/00 主分类号 H04S7/00
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