发明名称 MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To limit the area occupying the step checking element to the minimum limit by dispersing a plurality of different step checking elements in the respective chips. CONSTITUTION:Chip regions 3-1-3-4 are disposed on a semiconductor substrate 2, and each chip region has equal function element regions 4-1-4-4 and equal arranged regions 20-1-20-4. Different step checking elements 16, 17, 18, 19 are dispersed in the check regions 20-1-20-4. The check steps can be simplified by disposing the check regions at the same chip regions, and the mask can also be readily formed. Thus, the area occupying the step checking elements can be limited to the minimum limit, the degree of freedom on the layout can be increased, and the mask can be readily manufactured, and the chip can be made to small sizes.
申请公布号 JPS56142662(A) 申请公布日期 1981.11.07
申请号 JP19800045935 申请日期 1980.04.08
申请人 NIPPON ELECTRIC CO 发明人 TSUBOKURA FUSAO
分类号 H01L21/822;H01L21/66;H01L27/04 主分类号 H01L21/822
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