发明名称 CALCULATING DEVICE
摘要 PURPOSE:To simplify the constitution of a calculating device by minimizing the bit length of the output date on a divider, a multiplier, a subtractor or an adder which perform the division, the multiplication, the subtraction or the addition respectively between the 1st and 2nd input data. CONSTITUTION:The date stored in an input register 1 are supplied to a left shifter 15 which shifts the data to the left by one bit, and the output data on the shifter 15 are stored in a 1st temporary register 16 having the 17-bit length. The data stored in an input register 3 and the register 16 are supplied to a divider 6, and the quotient data, i.e., the dividing result of the divider 6 are stored in a 2nd temporary register 17 of 17-bit length. The data stored in the register 17 are supplied to a right shifter 18 and shifted to the right by one bit. The output data of the shifter 18 are stored in a 3rd temporary resister 19 of 16-bit length. Then the data stored in the register 19 and the least significant bit value of the register 17 are supplied to an adder 13.
申请公布号 JPH04162131(A) 申请公布日期 1992.06.05
申请号 JP19900288698 申请日期 1990.10.26
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 MIZUGUCHI HIROSHI
分类号 G06F7/38 主分类号 G06F7/38
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