发明名称 SIZING DEVICE FOR LSI MASK PATTERN
摘要 PURPOSE:To perform the automatic sizing of array place cells with a hierarchical structure without deploying them to the lower-level hierarchy arranged with cells into a matrix shape by recognizing the array place cells, and varying the processing for this sizing and the sizing of the chip area other than the array place cells. CONSTITUTION:A place information table containing the coordinate data specifying positions of cells is prepared, chip cells other than array place cells are hierarchically deployed, the polygon data contained in the chip cells are OR- merged for each layer according to the directed parameters in reference to this table, and a polygon data base for each layer is prepared. The minimum rectangular including the outermost polygon of the array place cells, i.e., a cell frame, is recognized, and the sizing of the portions in contact with this cell frame is not performed. The array place cells are not deployed to the lower-level hierarchy arranged with the cells into a matrix shape in reference to the table, the polygon data contained in the array place cells are OR-merged for each layer, and a polygon data base for each layer is prepared. The sizing data of the array plate cells in a data file and the area other than the array place are synthesized to prepare the data for machining a photo-mask.
申请公布号 JPH04156547(A) 申请公布日期 1992.05.29
申请号 JP19900283164 申请日期 1990.10.19
申请人 MITSUBISHI ELECTRIC CORP 发明人 FUNAKI HIROSHI
分类号 G03F1/68;G03F1/70;G06F17/50;H01L21/027 主分类号 G03F1/68
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