| 摘要 |
PURPOSE:To reduce the access cycle time for each terminal device, by transmitting cyclically the group address from the main operation board and then giving access to the terminal devices at every group in case no fault detection monitor data is supplied to the monitor input terminal. CONSTITUTION:When no fault detection monitor data is supplied to the monitor input terminals K1-K4, the address control terminal C0 is controlled to H level. As result, the transistor Q becomes conductive for the address switching circuit 6. Then the collector side of the transistor Q is set at L level. And the individual address setting input terminals A0-A3 of the terminal device 3 are set at L level regardless of the state of the individual address setting switches S0-S3. Accordingly, access is given to the address of the device 3 by the high-order bits A4-A7 the group address setting input terminals A0-A7. |
