| 摘要 |
PURPOSE:To indicate 0 km/h forcedly without any delay in response even at the time of a sudden stop by memorizing the content of counting sequentially and comparing the vehicle speed at this time with the vehicle speed at the previous time and a reference vehicle speed in the speedometer counting a vehicle speed pulse every fixed gate time. CONSTITUTION:The vehicle speed pulse from a detecting part 10 passes a gate 14 only for a prescribed time and is counted by a counter 16. In accordance with the output from a reset pulse generator 23, the content of counting in the counter 16 is transferred sequentially from the counter 16 to a register 24, thence from the register 24 to a vehicle speed register 26 and further from the vehicle speed register 26 to a similar register 28. And, the content of counting read out by a control circuit 32 is compared with the reference speed N0 and a reference deceleration N4 in a memory circuit 34 at a comparison circuit 38. On condition that such total conditions as N1 (counted value of this time) <= N0, N2 (counted value of previous time) -N1>=N4 and N3 (counted value of two times before)-N2>=N4 are effected (at the time of a sudden stop), an AND circuit 46 gives an output and an indication register 18 is reset forcedly by a reset circuit 48, and therefore, an indication part 22 indicates the vehicle speed of 0. |
