发明名称 SELF-DIAGNOSIS CIRCUIT
摘要 PURPOSE:To enable the operation of a main signal circuit to be confirmed even upon interference of an input signal by providing a clock signal generation circuit, a special pattern generation circuit and selector circuit for selecting an input signal or a special pattern to be outputted to a two-branched circuit. CONSTITUTION:An input signal is constituted of data 1 and a clock signal 2 synchronized therewith, and inputted to a selector circuit 12. In the selector circuit 12, selection is made between a signal generated via a special pattern generation circuit 10 on the basis of a clock signal from a clock signal generation circuit 11, and an input signal. The signal entered from the circuit 12 to a two-branched circuit 5 is separated into two signals. One of the separated signals is outputted to a coding circuit 6, and the other to a signal collation circuit 8. The circuit 6 processes the signal on the basis of a certain rule, and then the signal is separated into two via another two-branched circuit 7. One of the separated signals is outputted as an output signal, and the other is restored to the original signal through a decoding signal circuit 9. In this case, output signals from the circuits 5 and 9 are compared with each other in the circuit 8, thereby detecting an error in main signal circuits (i.e., circuits 5, 6 and 7).
申请公布号 JPH04152283(A) 申请公布日期 1992.05.26
申请号 JP19900277171 申请日期 1990.10.16
申请人 NEC CORP 发明人 KAMATA YOSHIKI
分类号 G01R31/28;G06F11/22 主分类号 G01R31/28
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