发明名称 |
COMPUTATION PROCESSOR COMPRISING SEVERAL SERIES- CONNECTED STAGES, COMPUTER AND COMPUTING METHOD USING THE SAID PROCESSOR |
摘要 |
COMPUTATION PROCESSOR COMPRISING SEVERAL SERIES-CONNECTED STAGES, COMPUTER AND COMPUTING METHOD USING THE SAID PROCESSOR The invention pertains chiefly to a computing processor comprising several series-connected stages and to the computer and computing method used to apply the said processor. The main object of the invention is a computing processor comprising elementary processors with n pipe-line stages. The processors of the present invention behave as n independent virtual elementary processors capable of processing n flows of different data. Thus, tasks are divided more efficiently into simple problems, and improved computing power is obtained on medium or short vectors. Furthermore, an object of the invention is a computer comprising several parallel processors according to the invention. The invention applies mainly to signal processing. |
申请公布号 |
CA1301944(C) |
申请公布日期 |
1992.05.26 |
申请号 |
CA19870550593 |
申请日期 |
1987.10.29 |
申请人 |
DE CORLIEU, PATRICK |
发明人 |
DE CORLIEU, PATRICK;DEMEURE, ALAIN;LEGENDRE, CLAUDE |
分类号 |
G06F15/16;G06F9/38;G06F15/80;G06F17/16 |
主分类号 |
G06F15/16 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|