发明名称 VARIABLE PHASE CIRCUIT
摘要 PURPOSE:To prevent the variation of a phase lag quantity of the circuit by providing a phase comparing pulse generation circuit which inputs input data and the output clock of a voltage-controlled oscillator, sets the discharging period of a charge pump to the 1/2 period of the output clock of a voltage- controlled oscillator and the charging period of the pump to the period from the rise of the input data to the fall of the output clock of the oscillator, and turns off its output during the charging and discharging periods. CONSTITUTION:The phase lag quantity of this variable phase circuit depends upon the ratio of a charging current to a discharging current. Therefore, when the phase is to be lagged by pi/2, the charging current is set to ic=2id and the charging period is set to the period from the rise of input data to the fall of the output clock of a voltage-controlled oscillator (VCO) 3 by means of a phase comparing pulse generation circuit 6. At the same time, the circuit 6 turns off its output during the charging and discharging periods and, when the charging and discharging periods are over, inputs a voltage to a loop filter 2. In this case, the output clock of the VCO 3 is stabilized at the moment the fall of the clock is lagged from the rise of the input data by pi/2.
申请公布号 JPH04150408(A) 申请公布日期 1992.05.22
申请号 JP19900273890 申请日期 1990.10.12
申请人 FUJITSU LTD 发明人 YAMAMOTO SATOSHI;TOKIWA KOJI
分类号 H03K5/13 主分类号 H03K5/13
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