| 摘要 |
PURPOSE:To improve the phase tracking performance of a recovered clock and to enhance the deterioration in an error rate by synthesizing edge detection pulses of each system and utilizing the result. CONSTITUTION:An output (detection output) of phase detectors 2a, 2b is inputted to a carrier recovery circuit 3 and inputted to data identification circuits 10a, 10b. Moreover, an output of both phase detectors 2a, 2b is inputted respectively to edge detectors 5a, 5b being components of a clock recovery circuit 100. An edge detection output of the edge detectors 5a, 5b is inputted to a synthesis circuit 6, and the edge detection output synthesized therein is compared with an output from a frequency divider 9 at a phase comparator 7. Thus, phase error information obtained from the phase comparator 7 has excellent tracking performance to the demodulation output and the tracking performance of a voltage controlled oscillator 8 is improved. |
