| 摘要 |
PURPOSE:To shorten the time of a division processing by subtracting a divisor shifted one bit rightward from the output of a first subtraction means and obtaining a 2-bit quotient within one cycle. CONSTITUTION:By adding a second subtraction means 14 and a 1-bit rightward shift circuit 13 and subtracting the divisor which as shifted one bit rightward with respect to the divisor used in a first subtraction means 11 from the output of the first subtraction means 11 in the second subtraction means 14, the output of the first subtraction means 11 is shifted one bit leftward and the subtraction equivalent to the subtraction of the divisor which is conventionally the processing in the next cycle is executed in the same cycle. That is, the 2-bit quotient can be obtained in one cycle. Thus, the time of the division processing can be shortened. |
