| 摘要 |
<p>When a decoder (412; 63) for decoding the addressing field of an instruction outputs an indication of calculating addresses, in the case wherein a decoded instruction has both of an explicit indication of calculating addresses and an implicit indication of calculating addresses, the decoder (412; 63) determines, according to the instruction code, that either the explicit indication or the implicit one is to be performed in advance (Fig. 3A, Fig. 3B), and outputs those in order. Thereby, an instruction having an explicit indication of calculating addresses and an implicit one can be interpreted and executed at a high speed by an efficient pipeline processing.</p> |
