发明名称 |
Data compression dictionary access minimization logic. |
摘要 |
<p>A logic circuit in an integrated circuit implementation of an adaptive data compression algorithm which uses a RAM to store dictionary entries. The logic circuit generates predetermined codewords for single-character strings without accessing the dictionary. The logic circuit also generates single-character strings for corresponding codewords without accessing the dictionary. <IMAGE></p> |
申请公布号 |
EP0485081(A2) |
申请公布日期 |
1992.05.13 |
申请号 |
EP19910309582 |
申请日期 |
1991.10.17 |
申请人 |
HEWLETT-PACKARD COMPANY |
发明人 |
TOBIN, JEFFREY P.;LANTZ, CARL B.;KATO, JEFF J. |
分类号 |
G06F5/00;H03M7/30;H03M7/40 |
主分类号 |
G06F5/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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