发明名称 DUPLEX PROCESSOR ARRANGEMENT FOR A SWITCHING SYSTEM
摘要 A DUPLEX PROCESSOR ARRANGEMENT FOR A SWITCHING SYSTEM The invention provides a duplex processor arrangement wherein the processors are only pseudosynchronized to each other. Each processor is provided with its own independent clock circuit and the two clock circuits operate at the same nominal frequency. A circuit means is provided for periodically forcing a rendezvous between processors whereat a controller circuit ensures that the processors have processed the same information since the last rendezvous. Each processor comprises a match circuit including memory means connected to store address/data information related to instructions performed by the processors. Each match circuit compares the information from the processors and generates an alarm signal upon a mismatch.
申请公布号 CA1300753(C) 申请公布日期 1992.05.12
申请号 CA19880572331 申请日期 1988.07.18
申请人 AYERS, DAVID J. 发明人 AYERS, DAVID J.;GUTTMAN, JACOB
分类号 G06F9/46;G06F15/16 主分类号 G06F9/46
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