| 摘要 |
A microprocessor based decoder module for television video signals which have been encoded by suppressing sync pulses and/or inverting picture video. The decoder modules generates sync restoration gates and/or video inversion gates developed from timing signals present in the VBI of the encoded video signal. The VBI timing signals may be either sync pulses which are not suppressed during the VBI, or special timing signals inserted at the video encoder. The microprocessor, in the decoder module, may contain externally selectable program segments where each segment will allow decoding of a different variety of video encoding.
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