发明名称 PLL SYNTHESIZER
摘要 PURPOSE:To attain high speed frequency control and to obtain a stable output without spurious radiation by comparing a reference phase with a feedback phase and driving a voltage controlled oscillator depending on an analog quantity equivalent to a phase difference. CONSTITUTION:A phase between a reference phase signal thetar obtained by a phase accumulator 1 and a phase of a feedback phase signal thetav being the output signal of a phase accumulator 6 are compared by a phase comparator 2, from which a phase error signal thetak is obtained. Moreover, a correction circuit 3 corrects an output range to be >>-pi, pi] to obtain a correct phase error signal thetak'. The phase error signal does not include any component other than the DC component required for VCO control and since the increment of the phase of the phase accumulators 1,6 is formed variable by data M, L given externally, then no normalizing circuit is required, then a round-off error for normalization is not caused and the output of a voltage controlled oscillator 5 is changed widely.
申请公布号 JPH04137914(A) 申请公布日期 1992.05.12
申请号 JP19900259629 申请日期 1990.09.28
申请人 YOKOGAWA ELECTRIC CORP 发明人 KUMAGAI MITSUHIRO;AGAWA HISAO
分类号 H03L7/16;H03L7/06;H03L7/18 主分类号 H03L7/16
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