| 摘要 |
<p>PURPOSE:To make an output stable by providing a capacitor in parallel with a CMOS buffer between the input and the output of the CMOS buffer. CONSTITUTION:When the input voltage from an input terminal IN changes from a logical high level to a logical low level, the input voltage of a CMOS buffer B is decreased gradually in a rate of the time constant. The input voltage to the CMOS buffer B is lower than a threshold voltage of the CMOS buffer B, the output voltage of the CMOS buffer B changes from a logic high level to a logic low level and the input voltage to the CMOS buffer B is dropped further momentarily. Thus, an event that the input voltage does not stay around the input threshold voltage of the CMOS buffer B and the output of the logic delay circuit is unstable is prevented.</p> |
