发明名称 FRAME SYNCHRONIZATION SYSTEM
摘要 PURPOSE:To decrease the probability of pseudo synchronization by preparing plural frame patterns and selecting the frame pattern regularly for each frame. CONSTITUTION:A reception section 102 receives an output signal of a frame pattern insertion circuit 108 and N-sets of frame pattern detection circuits 109, 110, 111 detecting N-kinds of frame patterns detect respective patterns and output the result to a reception frame pattern selection circuit 112. The reception frame pattern selection circuit 112 detects the frame pattern from all output signals of all the frame pattern detection circuits 109, 110, 111 when a control signal from a frame synchronization circuit 113 represents an asynchronization state and enters the frame synchronization process and is controlled regularly so as to pass a frame pattern succeeding to the frame pattern received precedingly from a succeeding frame.
申请公布号 JPH04137936(A) 申请公布日期 1992.05.12
申请号 JP19900260753 申请日期 1990.09.28
申请人 NEC CORP 发明人 NAMIKADO NAGAHIKO
分类号 H04J3/06;H04L7/08 主分类号 H04J3/06
代理机构 代理人
主权项
地址