| 摘要 |
<p>Clock frequency tester for indicating whether the frequency of a clock (FB) has a value which is comprised within a predetermined range of values (FA-FA/n, FA+FA/n) around a reference frequency value (FA). The clock frequency tester includes a frequency mixer (100) which provides an output frequency FQ in accordance with the relation FQ = absolute value of (FA-FB) for FB remaining close to FA, and a divide-by-n circuit (101) which divides the frequency FA. The frequency tester further includes a phase frequency comparator (102) which has a first and second input lead F1 and F2 which are respectively connected to the output of the divide-by-n circuit (101) and to the output of the frequency mixer (100). The phase frequency comparator (102) generates an output signal Q2 which remains at a steady level whenever F1 input signal has a frequency value which is superior to that of the F2 input signal, that is to say when the FB frequency to be tested is comprised within the range of values (FA-FA/n, FA+FA/n) (for FB remaining close to FA). Since the factor n of the division can be easily adjusted, any desired degree of accuracy can be provided by the frequency tester of the invention. <IMAGE></p> |
