发明名称 |
CIRCUIT IMPLEMENTATION OF BLOCK MATCHING ALGORITHM |
摘要 |
A circuit for implementing a full search block matching algorithm for coding video signals sequentially receives pixel values from a block of pixels in a current video frame and sequentially receives pixel values from a search area of a previous video frame. The circuit includes a plurality of processors for calculating in parallel a group of error functions corresponding to a group of positions of the block in the search area. The error functions are compared for determining the block position having the minimum error function. |
申请公布号 |
EP0400084(B1) |
申请公布日期 |
1992.05.06 |
申请号 |
EP19890903902 |
申请日期 |
1989.03.13 |
申请人 |
BELL COMMUNICATIONS RESEARCH, INC. |
发明人 |
WU, LANCELOT;YANG, KUN-MIN |
分类号 |
H04N7/32;G06T7/00;G06T7/20;H04N5/14;H04N7/26 |
主分类号 |
H04N7/32 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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