Electrically programmable antifuse incorporating dielectric and amorphous silicon interlayer.

摘要

An antifuse may be fabricated as a part of an integrated circuit in a layer located above and insulated from the semiconductor substrate (10). The antifuse includes a lower first electrode (14), a first dielectric layer (20) disposed over the lower first electrode, a layer of amorphous silicon (22) disposed above the first dielectric layer, a second dielectric layer (24) disposed above the amorphous silicon layer, and an upper second electrode (26) disposed above the second dielectric layer.