发明名称 System for performing addition and subtraction of signed magnitude floating point binary numbers
摘要 A versatile floating point adder which performs high speed floating point addition or subtraction on operands supplied in a signed magnitude format includes separate exponent and mantissa data paths for processing the exponent fields and mantissa fields of the floating point binary numbers to be added or subtracted. The exponent data path computes the absolute difference between the exponents of the floating point numbers, passes the large exponent, and adjusts the large exponent by an amount needed to normalize the mantissa and to reflect an overflow in the mantissa addition/substration and mantissa rounding operations. The mantissa data path denormalizes one of the input mantissas, adds the two mantissas after the denormalization operation, post-normalizes the resulting mantissa, and rounds the mantissa to the correct precision.
申请公布号 US5111421(A) 申请公布日期 1992.05.05
申请号 US19900484752 申请日期 1990.02.26
申请人 GENERAL ELECTRIC COMPANY 发明人 MOLNAR, KARL J.;CHUNG-YIH, HO;STAVER, DANIEL A.;MOLNAR, BARBARA D.
分类号 G06F7/485;G06F7/50 主分类号 G06F7/485
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