WAFERINTEGRIERTE HALBLEITERANORDNUNG.

摘要

A method of fabricating a wafer-scale integrated circuit device, and such a device, in which a plurality of IC chips (2), each prepared with a protective film (3) over its wired surface, are placed on a substrate (4, 4'), and binder material (6) is grown to fill gaps between the chips (2) and to bind chips together on the substrate. The protective film (3) on the chips is then exposed, either by removing excess binder material (6) or by removing (all or substantially all - depending on whether or not the chips (2) are located in depressions (5) in the substrate) the substrate (4) (depending on whether the wired surfaces of the chips are initially placed downwards on the substrate, or upwards away from the substrate). The protective film (3) is then removed to expose the wired surfaces (3') of the chips. Wiring patterning (7, 9) is then formed to interconnect the chips (2) and to provide (10) for connection of the device to external circuitry.