发明名称 A read-only memory.
摘要 <p>A read-only memory includes columns of memory cell arrays, a plurality of banks formed by dividing each column of the memory cell arrays along the columns, sub-bit lines disposed between adjacent banks situated along the rows and connected to a transistor of each memory cell, and main-bit lines disposed between every two other columns of the memory cell arrays and extending along the columns, wherein the sub-bit lines are divided into sets of three sub-bit lines connected to a pair of adjacent banks situated along the rows, and one end of each center sub-bit line being connected to a first main-bit line through a first selector transistor, the first main-bit line passing through one side of the set to which the center bit-line belongs, and the other end of the sub-bit line being connected to a second main-bit line through a second selector transistor, the second main-bit line passing through the other side of the set to which the center sub-bit line belongs, the two outer sub-bit lines being directly connected to the main-bit lines adjacent to the set of banks, respectively. &lt;IMAGE&gt;</p>
申请公布号 EP0482880(A2) 申请公布日期 1992.04.29
申请号 EP19910309738 申请日期 1991.10.22
申请人 SHARP KABUSHIKI KAISHA 发明人 HOTTA, YASUHIRO;OKADA, MIKIRO
分类号 H01L27/112;G11C17/12;H01L21/8246 主分类号 H01L27/112
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