| 摘要 |
PURPOSE:To stabilize and memory information and to read it in a high speed, by dividing and disposing plural sense amplifier circuit driving transistors in each sense amplifier circuit. CONSTITUTION:Sense amplifier circuit driving transistors T21-T2i-T2n are divided and disposed in each sense amplifier circuit 3. By this configuration, charge of latch node through the sense amplifier circuit driving transistor T11 by a sense amplifier circuit driving signal phiS1 is delayed in the second group of sense amplifier circuit 3 which is far from a word line driver circuit 7, and delay of word line signal is compensated, and stable detecting operation is made possible. Since discharge of latch node 9 by sense amplifier circuit driving transistors T21-T2n disposed separately in each sense amplifier circuit 7 is performed at high speed, high speed operation of the sense amplifier circuit 7 is made possible. |
