发明名称 FSK DEMODULATION CIRCUIT
摘要 PURPOSE:To improve considerably code distortion by providing a zero cross point detection circuit, a counter, a decoder, 1st and 2nd pulse generating circuit and a gate circuit to the demodulation circuit. CONSTITUTION:The demodulation circuit consists of a zero cross point detection circuit 2, a counter 3, a decoder 4, 1st pulse generating circuit 5, a 2nd pulse generating circuit 6 and an OR circuit 7. That is, the zero cross point detection circuit 2 consists of a comparator 10 and a differentiating circuit 11, the 1st pulse generating circuit 5 consists of an RS latch circuit 17 and the 2nd pulse generating circuit 6 consists of a counter circuit 19 and an RS latch circuit 18 respectively. In this case, it is possible to demodulate and reproduce a data having a same pulse width (data width) as that of an original binary digital signal. Thus, code distortion due to a reproduced data pulse width error is considerably improved.
申请公布号 JPH04127638(A) 申请公布日期 1992.04.28
申请号 JP19900248243 申请日期 1990.09.18
申请人 NEC CORP 发明人 SHINOHARA KOJI
分类号 H04L27/14;H04L27/156 主分类号 H04L27/14
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