| 摘要 |
<p>PURPOSE:To normally detect clock interruption even if a noise is inputted at the time of the clock interruption by detecting the changing point of an inputted clock, and counting the number of the clocks by inputting the output of a gate circuit whose first input and second input are the clock and detection output respectively as a reset signal, and outputting an interruption signal. CONSTITUTION:A changing point detection circuit 7 detects the rise and the fall of clock input 1. A changing point decision circuit 8 outputs 'LOW' when the number of the changing points is larger than the number determined beforehand, and it outputs 'HIGH' in the case of coincidence or the smaller number. A 0-string counter 4 counts a down detecting clock 2 when there is not the output pulse (C) of an AND gate 3, and when it counts the prescribed number of pieces, it sends a down pulse (D) as the clock of a flip flop 5, and when it receives the output pulse (C) of the AND gate 3 before it counts the number of pieces determined for the flip flop 5, it resets the counter. At that time, the flip flop 5 too is reset similarly, and stops a down signal 6.</p> |
