Master clock distributing method and apparatus using same.

摘要

A logic processing apparatus comprises a plurality of integrated circuits (6-1 - 6-n), a multi-phase clock generator (5) for distributing clock signals having different phases from one another to the respective integrated circuits (6-1 - 6-n), and a package (20), for air tight sealing the multi-phase clock generator (5) and the plurality of integrated circuits (6-1 - 6-n), which has an optical signal transmissible window for transmitting the master clock to the multi-phase clock generator (5) through the optical transmitting line (4).