| 摘要 |
PURPOSE:To increase an yield as well as to make the device more integrated by alleviating level difference formed between memory cell array sections and a peripheral circuit section. CONSTITUTION:On an element formation surface of a p-type semiconductor substrate 1, a plurality of memory cell array sections 2 and a peripheral. circuit section (direct peripheral circuits 3 and 4, indirect peripheral circuit 5) are formed. The circuits 5, 4 and the array nations 2 are connected through wirings 31. Running through connection holes 29, the wirings 31 are connected to elements of the array sections 2 on one end and are connected to elements of the circuits 3, 4 on the other end. In a process in which the data lines 31 are formed and in a process in which the wirings 31 are formed, the level differences formed on a part of the surface of a layer-to-layer insulated film which lies between the array sections 2 and the peripheral circuit section are alleviated. Therefore, chances of the breaking of wires are reduced and the etch residue is lessened. Consequently, the semiconductor circuit device enjoys a higher yield and is made more integrated. |
