发明名称 ALARM CIRCUIT
摘要 PURPOSE:To execute the dead delay operation of a lot of monitor object signals only by one dead delay element by providing a switching command means, sampling means, means for deciding the presence/absence of an alarm, arithmetic means and holding means. CONSTITUTION:When a decision circuit 3 decides the presence of the alarm, a holding value (preceding held alarm state value S61) in a preceding cycle and '1' are applied from a shift register 6 to an adder 4 and the both values are added. A previously set value required for obtaining the optimum delay corresponding to a sampled input alarm signal at present is read out from a memory (ROM) 8 corresponding to the count value of a counter 1 and applied to the adder 4 as a threshold value. In the adder 4, the added result is compared with this threshold value and when the added result reaches the threshold value, an alarm signal S41 is outputted. Thus, a threshold value different for each alarm class can be applied as a comparative reference, the threshold value to be the determination of the adder 4 is decided by input alarm signals I1-In, and the optimum dead time can be respectively obtained.
申请公布号 JPH04120924(A) 申请公布日期 1992.04.21
申请号 JP19900240111 申请日期 1990.09.12
申请人 TOSHIBA CORP 发明人 TAKASO KAZUTO
分类号 G08B23/00;G08B25/00;G08B29/18;H04B17/00 主分类号 G08B23/00
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