发明名称 |
System for partitioning and testing submodule circuits of an integrated circuit |
摘要 |
A system for providing testing capability of individual submodules on an integrated circuit module. A test bus having a plurality of conductors is connected to selected internal ports of said submodules through three-way analog switches. Each three-way analog switch provides the capability to observe and control an internal port through combination of the ON/OFF status of two transmission gates. Test patterns for controlling the transmission gates may be provided by onboard D flip-flops which are externally programmed to control or observe ports of an individual submodule.
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申请公布号 |
US5107208(A) |
申请公布日期 |
1992.04.21 |
申请号 |
US19910715035 |
申请日期 |
1991.06.11 |
申请人 |
NORTH AMERICAN PHILIPS CORPORATION |
发明人 |
LEE, NAI C. |
分类号 |
G01R31/28;G01R31/3185 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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