| 摘要 |
A frame synchronization system includes a synchronization detector supplied with a digital signal including frame synchronizing pulses for outputting the digital signal in a frame synchronization state, an adding part for adding a forward guard identification code to the digital signal output from the synchronization detector when a forward guard information is received from the synchronization detector, a first memory for storing the digital signal including the forward guard identification code output from the adding part, a detector for monitoring the digital signal read out from the first memory and for outputting forward guard detection information when the digital signal read out from the first memory includes the forward guard identification code, a second memory for storing the digital signal read out from the first memory in response to a control signal, where the digital signal read out from the second memory is output as an output signal of the frame synchronization system, and a controller for producing the control signal which controls write and read operations of the first and second memories in response to synchronization error information and the forward guard detection information. The synchronization error information is output when a synchronization error of the digital signal is detected and the forward guard information is output from a time when an abnormality of the frame synchronizing pulses is detected to a time when the synchronization error is detected. The control signal prohibits the digital signal read out from the first memory from being stored in the second memory when the controller receives at least one of the synchronization error information and the forward guard detection information.
|
